1. Field of the Invention
The present invention relates to a circuit board having solder balls or bumps such as for flip-chip bonding and ball grid array. Further, the present invention relates to a method of producing such a circuit board. Still further, the present invention relates to a flattening and leveling jig used for carrying out the method.
2. Description of the Related Art
In case of mounting, for example, an integrated circuit chip on an integrated circuit board, it is known to form on their joining surfaces a plurality of terminals of a grid pattern or checkered pattern and bond them by way of the terminals, i.e., a technology that is called flip chip.
Further, it is also known, in case of joining an integrated circuit board having installed thereon an integrated circuit chip to a printed circuit board such as a motherboard, a bonding technology of forming on a back surface of the integrated circuit board (i.e., a joining surface opposite to the front surface on which the integrated circuit chip is installed) a plurality of terminals which are bonding balls of high melting point solder, Cu or the like and arranged so as to form a grid pattern, for thereby bonding the integrated circuit board to the printed circuit board, such a board being called a ball grid array (BGA) board.
Various technologies such as a solder paste technology are known for forming such an integrated circuit board or the like having terminals adapted for surface-to-surface joining and arranged so as to form a grid or checkered pattern.
For example, as shown in FIG. 15A, the solder paste technology includes a process of applying solder paste onto conductive base pads formed on an integrated circuit board by printing and thereafter melting the paste by heating for thereby forming semi-spherical or spherical solder bumps on the pads.
However, forming the solder bumps in the above described manner includes problems described hereinafter and improvement thereof has been eagerly required.
(1) Generally, it has been considered desirable that solder bumps formed on an integrated circuit board are equal in height to each other for the purpose of improving the joining or bonding ability or the like to be joined or bonded to the integrated circuit chip or the printed circuit board. That is, as shown in FIG. 15B, it has been considered desirable that the coplanarity xe2x80x9cdxe2x80x9d of all of the solder bumps xe2x80x9cpxe2x80x9d is small.
In this connection, the term xe2x80x9ccoplanarityxe2x80x9d is expressed or represented by the distance xe2x80x9cdxe2x80x9d between two parallel surfaces S1 and S2 between which the tops or apices of all the solder bumps xe2x80x9cpxe2x80x9d are included, and is used as an index for indicating the irregularity in the height or level of the solder bumps. In this invention, a coplanarity per unit length, which is obtained by dividing the coplanarity by the maximum distance between the solder bumps (i.e., normally, the diagonal distance of the area in which the solder bumps are formed) since the coplanarity depends on the area in which the solder bumps are formed.
However, the height of each solder bump of itself varies depending upon the volume of solder applied to each pad and the size of the pad, etc., so that a variation in the volume of solder, the size of the pad, etc. causes the solder bumps to become irregular in height. Accordingly, there is caused a problem in that the coplanarity becomes larger. A further problem is that even if the solder bumps are equal in height a large coplanarity results in case the board is warped or curved.
When the coplanarity is large, a joining defect may possibly be caused since the distance between the terminals standing opposite to each other becomes irregular at the time of joining the integrated circuit board to the integrated circuit chip or the printed circuit board. Further, even in case a probe is made to contact respective solder bumps with a view to examining the conduction of the conductors and the insulation between the conductors, it becomes difficult for the probe to contact predetermined solder bumps or all the solder bumps at the same time, so there occurred a case in which accurate measurement could not be obtained.
(2) An image processor is used for measurement of the coplanarity of the solder bumps for the purpose of examining the joining ability of the integrated circuit board but includes a problem in that since the top of the solder bump is constituted by a curved surface it is difficult to detect the highest point or apex of the solder bump and it is inevitable to set at least three points to which a laser beam is irradiated even in the case the highest point (apex) is obtained by approximation, causing a problem in that much labor is required.
According to an aspect of the present invention, there is provided a circuit board which comprises a substrate having a joining surface, and a plurality of solder bumps disposed on the joining surface of the substrate in such a manner as to form a predetermined profiled line or surface pattern, wherein the solder bumps have tops which are flattened and leveled, and a coplanarity of the solder bumps is 0.5 xcexcm or less per 1 mm. In this connection, the term xe2x80x9csolderxe2x80x9d is herein used to mean or indicate Pbxe2x80x94Sn based soft solder and other low melting point solders in a broad sense, such as Auxe2x80x94Sn solder, Auxe2x80x94Si solder, etc. Further, the term xe2x80x9ccircuit boardxe2x80x9d is intended to indicate not only (1) a board on which an integrated circuit chip is mounted but (2) a board to be joined with a printed circuit board and (3) an integrated circuit chip of itself (i.e., flip chip). More specifically, indicated by that term are (1) a board having, at one side surface thereof, a plurality of solder bumps for joining to an integrated circuit chip or chips (flip chip bonding), (2) a board having, at one side surface thereof, a plurality of solder bumps (usually, BGA), for joining to a printed circuit board, and (3) an integrated circuit chip having a plurality of solder bumps. The above described profiled line pattern is for example a square frame-like pattern. The profiled surface pattern is for example a grid pattern or checkered pattern.
According to a further aspect of the present invention, circular pads are interposed between the solder bumps and the substrate to serve as base layers of the solder bumps.
According to a further aspect of the present invention, the tops of the solder bumps have nearly circular flat surfaces which are smaller in diameter than the pads.
According to a further aspect of the present invention, the tops of the solder bumps have nearly circular flat surfaces which are substantially equal in diameter to the pads, and the height of the solder bumps is smaller than the diameter of the pads.
According to a further aspect of the present invention, there is provided a method of producing a circuit board including a substrate having a joining surface, and a plurality of solder bumps disposed on the joining surface of the substrate in such a manner as to form a predetermined pattern, wherein the solder bumps have tops which are flat and leveled, and a coplanarity of the solder bumps is 0.5 xcexcm or less per 1 mm. The method comprises the steps of placing masses of solder on the solder bumps, respectively, disposing a control member in the form of a flat plate at a predetermined position above the masses of solder, and forming the masses of solder into the solder bumps all at once by melting the masses of solder and allowing the control member to control the height of the solder bumps while flattening the tops of the solder bumps all at once. The above described solder material can be solder paste, solder preform, solder ball, one having been already formed into solder bump, or the like. The material for the above described control member can be a metal such as titanium and stainless steel, ceramics such as alumina, silicon nitride and silicon carbide, glass and the like, and such one that is not wetted by solder or has a difficulty in being wetted by solder is suitable therefor. Particularly, ceramics are suitable on the working accuracy and in that its deformation by heat is small. The control member is a member for flattening the tops of the solder bumps while leveling the same, so it is desirable, for example, to provide to the opposite ends of a flat or planar plate with a pair of leg members so as to form an assembly having a U-like cross section since it becomes possible to control or adjust the level of the solder bumps through adjustment of the length or height of the leg members and furthermore the workability is improved. The temperature for melting the above described solder is required only to be equal to or higher than the melting point of the solder bump (i.e., the melting point of the solder) and, for example, can be higher than the melting point by 10 to 40xc2x0 C.
According to a further aspect of the present invention, in the above described method a plurality of pads are disposed on the joining surface of the substrate in such a manner as to form a predetermined profiled line or surface pattern, and the solder bumps are once formed on the pads, respectively and then pressed in such a manner as to allow the tops to be flattened and leveled. In carrying out the above described pressing, there are two cases, i.e., one in which a pressing portion of a pressing device is heated by a heater and the other in which the pressing portion is no heated. Of those, the case of heating is suitable since excessive stress does not result and solder bumps having smooth outer surface can be formed. In the meantime, in this instance, it is desirable to carry out the pressing in nonoxidizing atmospheres in order to prevent oxidation of the solder due to heating.
According to a further aspect of the present invention, in the above described method a plurality of pads are disposed on the joining surface of the substrate in such a manner as to form a profiled line or surface pattern, and the solder bumps are once formed on the pads, respectively and then ground in such a manner as to allow the tops to be flattened and leveled. As a means for carrying out such grinding, a grinding machine having a rotary grinding wheel, for instance, can be used.
According to a further aspect of the present invention, there is provided a flattening and leveling jig for disposition above solder materials mounted on a main surface of a circuit board for controlling the height of solder bumps into which masses of solder are formed by being heated and molten. The jig comprises a control member having a planar surface for controlling the height of the solder bumps, and a pair of leg members which are independent parts and disposed on the side of the planar surface of the control member for support of the control member and for positioning of the planar surface. The material for the above described control member can be a metal such as titanium and stainless steel, ceramics such as alumina, silicon nitride and silicon carbide, glass and the like, and such one that is not wetted by solder or has a difficulty in being wetted by solder is suitable therefor. Particularly, ceramics are suitable on the working accuracy and in that its deformation by heat is small.
According to a further aspect of the present invention, in the above described jig the leg members are so constructed and arranged as to allow the planar surface of the control member to be parallel to the main surface of the substrate when the flattening and leveling jig is disposed in place.
According to a further aspect of the present invention, in the above described jig the leg members are made of wire rod. Such wire rod can be round or square rod.
According to a further aspect of the present invention, in the above described jig the control member has on the side of the planar surface a pair of grooves in which the leg members are fitted.
The above described circuit board, method of producing such a circuit board and a jig used in carrying out the method are useful and effective for solving the above noted problems inherent in the prior art device.
It is accordingly an object of the present invention to provide a novel and improved circuit board having a plurality of solder bumps, which can decrease the coplanarity of the solder bumps assuredly while simplifying measurement of the coplanarity.
It is a further object of the present invention to provide a novel and improved method of producing a circuit board of the foregoing character.
It is a yet further object of the present invention to provide a jig used for carrying out the method of producing a circuit board of the foregoing character.